The present invention relates to methods for reducing warpage of semiconductor die.
Semiconductor wafer thinning technology is important to package development. Current wafer thinning methods include the in-line wafer B/G (BackGrinding) system and the DBG (Dicing Before Grinding) process. Wafer B/G systems have used a film adhesive process in which the wafer is thinned by backgrinding and then is diced (that is, the semiconductor wafer is separated into individual semiconductor die), typically using a laser or a dicing saw. The laser or dicing saw follows markings on the circuit side of the wafer. Before dicing, a wafer mounting tape, also called dicing tape, is typically attached to the backside of the wafer. The dicing tape keeps the die in place after dicing. With the DBG process, the wafer is diced before backgrinding.
The semiconductor die is typically mounted onto a mounting surface of a substrate or of a previously mounted die and is adhered to the die or to the substrate with a paste (typically an epoxy paste adhesive) or a film adhesive. Generally, paste adhesives have been used more often than film adhesives.
After the chip mounting process, bonding pads of the chips are connected to bonding pads of the substrate, and/or bonding pads of the underlying previously mounted die, with Au or Al wires during a wire bonding process to create an array of semiconductor chip devices. Finally, the semiconductor chips and their associated wires connected to the substrate are encapsulated, typically using an epoxy-molding compound, to create an array of encapsulated semiconductor devices. The molding compound protects the semiconductor devices from the external environment, such as physical shock and humidity. After encapsulation, the encapsulated devices are separated (singulated), typically using a laser or a saw, into individual semiconductor chip packages.
To obtain the maximum function and efficiency from the minimum package, various types of increased density packages have been developed. Among these various types of packages is the multiple-die semiconductor chip package, commonly referred to as a multi-chip module, multi-chip package or stacked chip package. A multi-chip module includes one or more integrated circuit semiconductor chips, often referred to as circuit die, stacked one onto another to provide the advantages of light weight, high density, and enhanced electrical performance. In addition, reducing the thickness of semiconductor die also helps to increase the package density. However, reducing the thickness of semiconductor wafers, and thus the thickness of the resulting semiconductor die, can create warpage problems for both the wafer and the die. While further backside treatment processes, such as wet etch, CMP, and dry polishing, can help, typically not all the warpage in the wafer can be removed, and this warpage can result in problems relating to nonuniform bond line thickness (BLT) during the die attach process.